Global Interconnect Optimization

We propose a new comprehensive solution to global interconnect optimization. Traditional buffering algorithms mostly insert repeaters on net-by-net basis based slacks and possibly guided by wires. show how integrate routing congestion, placement timing constraints, power consumption, additional constraints into single resource sharing formulation. The core of our algorithm is buffered subroutine. Given net Lagrangean prices for routing, timing, placement, power, it computes Steiner tree. framework provides special multiplicative price update fast convergence. Our enough practical instances. demonstrate experimentally 7nm microprocessor units that significantly improves while reducing netlength consumption in an industrial design flow. implementation scales well under parallelization with up 128 threads.